H2M: Heuristics for Heterogeneous Memory
H2M is a ANR-DFG project between
the TADaaM team
at Inria Bordeaux - Sud-Ouest (France)
and the HPC Group
at RWTH Aachen University (Germany)
from 2021 to 2023.
The overall goal is to leverage hwloc
knowledge of heterogeneous memory up to programming languages such as OpenMP
to ease the allocations of data sets in the appropriate target memories.
The project kick-off meeting was held in videoconference.
- RWTH Aachen University
- WP1: Quantifying Heterogeneous Memory.
- Task 1.1: Review of heterogeneous memory architecture trends.
- Task 1.2: Identifying the memory topology in a platform.
- Task 1.3: Exposing raw memory characteristics to runtimes.
- Task 1.4: Quantification of the influence on application performance.
- Task 1.5: Quantification of the influence on application capabilities.
- WP2: Abstracting Memory Allocation.
- Task 2.1: Memory Allocation with Explicit Data Type Information.
- Task 2.2: Specification of Initial Memory Access Pattern.
- Task 2.3: Modification of of Memory Access Pattern over Time.
- WP3: Runtime Heuristics.
- Task 3.1: Thread Placement with respect to Memory Hierarchy.
- Task 3.2: Data Placement in Heterogeneous Memory Architectures.
- Task 3.3: Data Movement based on Information from Annotated Allocations.
- WP4: Defining Concepts to extend Parallel Programming Systems.
- Task 4.1: Constructs and APIs to query the memory subsystem.
- Task 4.2: Constructs and APIs to annotate memory allocation.
- Task 4.3: Constructs and APIs to facilitate data movement.
- WP5: Evaluating our Contributions.
- Task 5.1: Performance measurements of heterogeneous memory subsystems.
- Task 5.2: Implementation of memory allocation abstractions in codes.
- Task 5.3: Evaluation of these codes on modern architectures.
J. Klinkenberg, P. Samfass, M. Bader, C. Terboven and M. S. Müller,
Reactive Task Migration for Hybrid MPI+OpenMP Applications,
In: Parallel Processing and Applied Mathematics (PPAM 2019), Springer International Publishing, pp. 59–71.
N. Denoyelle, B. Goglin, A. Ilic, E. Jeannot, and L. Sousa.
Modeling Non-Uniform Memory Access on Large Compute Nodes with the Cache-Aware Roofline Model.
In: IEEE Transactions on Parallel and Distributed Systems 30.6 (June 2019), pp. 1374–1389.
J. Sewall, S. J. Pennycook, A. Duran, C. Terboven, X. Tian, and R. Narayanaswamy.
Developments in memory management in OpenMP.
In: IJHPCN 13.1 (2019), pp. 70–85.
E. A. León, B. Goglin, and A. R. Proaño.
M&MMs: Navigating Complex Memory Spaces with hwloc.
In: The Fifth International Symposium on Memory Systems Proceedings (MEMSYS19).
Washington, DC: ACM, Oct. 2019, pp. 149–155.
E. Jeannot, G. Mercier, and F. Tessier.
Process Placement in Multicore Clusters: Algorithmic Issues and Practical Techniques.
In: IEEE Transactions on Parallel and Distributed Systems 25.4 (Apr. 2014), pp. 993–1002.
A. E. Eichenberger, C. Terboven, M. Wong, and D. an Mey.
The Design of OpenMP Thread Affinity.
In: OpenMP in a Heterogeneous World - 8th International Workshop on OpenMP, IWOMP 2012,Rome, Italy, June 11-13, 2012.
Proceedings. Ed. by B. M. Chapman, F. Massaioli, M. S. Müller, and M. Rorro.
Vol. 7312. Lecture Notes in Computer Science. Springer, 2012, pp. 15–28.